References:
[1] David. (2020, October 30). Global interposer MARKET 2020 Industry key player – Murata, ALLVIA, Inc, tezzaron, AGC Electronics, Tsmc, XILINX, Amkor, umc, IMT, Plan Optik AG,. Retrieved from https://bcfocus.com/globalinterposer...
[2] Fangaria, P. (2019, June 14). 3DIc physical design. Retrieved from https://semiwiki.com/fpga/xilinx/1039...
[3] Edn. (2012, January 05). Xilinx announces highestcapacity FPGA. Retrieved from https://www.edn.com/xilinxannounces...
[4] Bolsens, I. (n.d.). 2.5D ICs: Just a Stepping Stone or a Long Term Alternative to 3D? Retrieved 2011, from https://www.xilinx.com/publications/a...
[5] E.H. Wong and Y.W. Mai, “1 Introduction,” in Woodhead Publishing Series in Electronic and Optical Materials, E.H. Wong and Y.W. B. T.R. D. of M. A. A. M. S. Mai Temperature and Moisture, Eds. Woodhead Publishing, 2015, pp. 1–24.
[6] McLellan, P. (2019, June 14). The world's Smallest printed circuit Boards: Interposers. Retrieved from https://semiwiki.com/fpga/xilinx/514...
[7] Sponsored by Oxford Instruments NanoAnalysisFeb 21 2014. (2020, February 21). Characterization of ThroughSilicon VIAS for 3D integrated chips With EBSD. Retrieved from https://www.azonano.com/article.aspx?...
[8] P. A. Thadesar, X. Gu, R. Alapati and M. S. Bakir, "ThroughSilicon Vias: Drivers, Performance, and Innovations," in IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 6, no. 7, pp. 10071017, July 2016, doi: 10.1109/TCPMT.2016.2524691.
[9] T. Nigussie and P. D. Franzon, "RDL and interposer design for DiRAM4 interfaces," 2016 IEEE 25th Conference on Electrical Performance Of Electronic Packaging And Systems (EPEPS), San Diego, CA, USA, 2016, pp. 1720, doi: 10.1109/EPEPS.2016.7835408.
[10] LaPedus, M. (2018, September 04). Challenges for future fanouts. Retrieved March 01, 2021, from https://semiengineering.com/challenge...
[11] Company, E. (2019, April 19). 2.5D and 3d ICs: New paradigms in ASIC. Retrieved March 01, 2021, from   / 25dand3dicsnewparadigmsinasic