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Zynq Part 1: Vivado block diagram (no Verilog/VHDL necessary!)

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FPGAs for Beginners

Hi, I'm Stacey, and in this video I show the vivado side of a basic Zynq project with no VHDL/Verilog required.

Not Sponsored, I just use this software a lot!
Download vivado here: https://www.xilinx.com/support/downlo...

Buy me a coffee to support my channel: https://www.buymeacoffee.com/fpgasfor...

posted by frekvencx2


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